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In this tutorial we will construct an Interactive Logic project using some of
the major design features. Then the finished design will be compiled and
downloaded into your Hevday Logic Module for monitoring and data manipulation.
Tutorial Steps:
- Interactive Logic Configuration
- Project Creation
- Creating a user defined schematic
- Designing a schematic symbol
- Creating a state diagram
- Constructing the top level
- Compiling and downloading
- Monitoring and forcing data
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Step 1: Interactive Logic Configuration
Before creating your first project you must specify a folder where Interactive
Logic project folders will reside. The folder you select should not contain any
spaces in it's path which would make it unacceptable to the Xilinx compiler tools.
To specify a folder, open the options dialog by selecting
'Options' on the Configuration menu and then select the 'Project Folders' item
in the sections list on the left hand side of the dialog.
If there are already one or more folders specified in the list then you can skip
the rest of this step.
Click the 'Add' button and select an existing empty folder or create a new
folder. Now the folder's path should be visible in the Project Folders list view
of the options dialog. Interactive Logic also requires information about how to
connect to the Hevday Logic Module. The IP address of the Hevday Logic Module must
be entered into the Options dialog under the Communication section. See the
Network Hardware Configuration.
To create our new empty project invoke the '
New Project' action by selecting it
from the File menu, or pressing Ctrl+N. You will be presented with the
New Project Dialog:
Type in the name 'MyProject' into the 'New project name:' field then click the
'OK'. Interactive Logic will now be displaying your new empty project.
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Step 3: Create a user defined schematic
From the Project menu invoke the
New Schematic action and type in
'MySchematic' for the name of the schematic. Leave the category field blank and
click the 'OK' button. The new schematic is automatically activated in the
Design Canvas.
On this schematic we are going to combine a 32 bit unsigned level
activated counter, and a forceable reset. Our intention is to make this
combination available to the project as a single symbol.
Start by dragging components from the Project Tree onto the Design Canvas and
arrange them like so:
Next double click on each input pin and output pin and name them in accordance
with the diagram below so that our wrapper has the same interface names as the
counter that we are using. To show the pin labels, right click on a pin and
select 'Show Label North/East/West/South'. You can also select a number of
components by dragging a selection rectangle around them and right clicking on
one of them, then selecting one of the show labels menu items.
Finally using the Wiring Tool connect up the
components as in the diagram:
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Step 4: Designing a schematic symbol
Invoke the Edit Symbol
action to display the Symbol Editor so that we can
customise the symbol for the schematic. First we need to adjust the size of the symbol
so that the 32 bit number from the counter will fit inside the symbol. This can
be done by increasing the width of the symbol to 14. Once this is done, adjust
the lines and text of the symbol so that the right hand edge fits in with the
three output pins. Adjusting the lines and text of the symbol to fit the new
width can be done easily by selecting all the lines to move at once by holding
down the Shift key and clicking on the lines to select, then dragging all the
lines across:
Now we are ready to place our data items onto the symbol. Activate the Data tab
of the Symbol Editor and expand the data tree to reveal the data items for the
forceable buffer and the counter. You will see a
DataGfxBit, a
ThreeSwitch and an
Integer. Drag the Integer into a suitable position on the symbol, then drag
the ThreeSwitch on to the symbol as well. The final symbol should look like
this:
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Step 5: Creating a state diagram
From the Project menu invoke the New State Diagram
action and type in
'MyStateDiagram' for the name of the state diagram. Leave the category field
blank and click the 'OK' button. The new state diagram is automatically
activated in the Design Canvas.
For the design of this state diagram we are going to have three states in a
loop, each state with a single output. Start by dragging states and transitions
from the Project Tree onto the
Design Canvas and arrange them like so:
Next double click on each state to edit the state's name. Name each state
'State One', 'State Two', 'State Three' respectively, as shown below.
To add an output to each state invoke the
Edit State Diagram Outputs
action from the Schematic menu and add three outputs, checking the correct check
box so each state has one output. After that,
select each transition in turn and move the transition's control points so the
transitions connect the states in a loop. Transition ends are correctly placed
when they snap to the outline of a state.
Double click on each transition and
name them T1 through T3. Finally right click on State One and select 'Set as
Initial State'. The end result should be a diagram like so:
Notice that State One is coloured green to indicate it will be the initial state
upon startup. Unlike Step 4 where we designed a symbol for a schematic, state
diagrams always use automatically generated symbols, so the
Symbol Editor is unavailable.
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Step 6: Constructing the Top Level
Activate the Top Level Schematic in the
Design Canvas by double clicking it in
the Project Tree.
Drag and drop a single instance of your newly created
schematic and state diagram from the 'Schematics' section of the Project Tree
onto the Design Canvas. Then connect forceable buffers to all inputs like so:
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Step 7: Compiling and Downloading
We are now ready to compile and download the design. Invoke the
Compile action
by clicking on the compile toolbar button. Once compilation has finished the
Results List should display 'Compilation Finished - 0 Error(s) 8 Warning(s)'.
The number of warnings reported during compilation may vary on your system due
to the way Interactive Logic has been configured. Now invoke the
Download action
by clicking the download toolbar button. After a short delay Interactive Logic
will enter online mode.
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Step 8: Monitoring and Forcing Data
To start the design invoke the
Run action from the
Build & Connect toolbar. The
design is now operational and you can try forcing the buffers and entering data
into the counter symbol. If you want to see the internals of the
schematic or state diagram working, just select them on the
Project Tree or double click their symbol.
- Forcing a buffer - To force a buffer, click or double click inside the
buffer's rectangle, a dialog will be displayed to allow you to choose
what value you would like to force into the buffer.
If the option
'Single click activation of online data'
is disabled then a double click is required.
- Changing an Integer value - To change the value of an integer click or
double click on the integer (depending on the single click activation
option noted above) and a dialog will appear where you may enter the
new value.
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